/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * (C) Copyright 2018
 * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
 */

#ifndef DT_BINDINGS_MPC83XX_CLK_H
#define DT_BINDINGS_MPC83XX_CLK_H
#define MPC83XX_CLK_CORE	0
#define MPC83XX_CLK_CSB		1
#define MPC83XX_CLK_QE		2
#define MPC83XX_CLK_BRG		3
#define MPC83XX_CLK_LBIU	4
#define MPC83XX_CLK_LCLK	5
#define MPC83XX_CLK_MEM		6
#define MPC83XX_CLK_MEM_SEC	7
#define MPC83XX_CLK_ENC		8
#define MPC83XX_CLK_I2C1	9
#define MPC83XX_CLK_I2C2	10
#define MPC83XX_CLK_TDM		11
#define MPC83XX_CLK_SDHC	12
#define MPC83XX_CLK_TSEC1	13
#define MPC83XX_CLK_TSEC2	14
#define MPC83XX_CLK_USBDR	15
#define MPC83XX_CLK_USBMPH	16
#define MPC83XX_CLK_PCIEXP1	17
#define MPC83XX_CLK_PCIEXP2	18
#define MPC83XX_CLK_SATA	19
#define MPC83XX_CLK_DMAC	20
#define MPC83XX_CLK_PCI		21
/* Count */
#define MPC83XX_CLK_COUNT	22
#endif /* DT_BINDINGS_MPC83XX_CLK_H */
